Vivado

Blue Pearl Products

Why Analyze RTL

Minimize design flow iterations

Quickly identify design issues that simulation and synthesis miss

Supports Verilog and VHDL

Supports large designs using Grey Cell^TM models

About Us

Blue Pearl Software is a privately held EDA (Electronic Design Automation) company that develops software to improve the productivity of IP and FPGA designers.

fpga-implementation

Blue Pearl Software Accelerates FPGA Implementation

The Blue Pearl Software Suite works with the Xilinx Vivado™ Design Suite running on Windows and Linux platforms. Our solution for RTL analysis includes linting, clock domain crossing (CDC) and automatic Synopsys Design Constraint (SDC) generation. With our SDCs, we make the synthesis and place and route phases of FPGA design implementation more efficient. Our Visual Verification Environment™ makes it easy to use for any level of FPGA designers to validate their constraints.

Call us to learn more about how release 6.0 of the Blue Pearl Software Suite can increase the productivity of designers while reducing their design risk.

Address
4699 Old Ironsides Drive, Suite 400
Santa Clara, CA 95054
Toll-Free +1 855-848-6600
Phone : +1 408-961-0121
Email : sales@bluepearlsoftware.com