Overview

The Blue Pearl Software Suite offers the capability to analyze ASIC and FPGA designs for Clock Domain Crossing (CDC) issues:

1. – Finds places in design that don’t have CDC synchronization that cause metastability
2. – Identifies CDC synchronization types
3. – Has IP block modeling capability that reduces complexity and accommodates lack of model availability
4. – Has reports and schematic to understand and debug CDC synchronization
5. – Easy setup by identifying clocks and FPGA clock generators.
6. – CDC is an option to Analyze RTL™, the base product within the software suite.

Ease of Setup

Blue Pearl eases design set up with automatic Clock and reset identification, SDC input of Domain information, understanding of clock generator blocks to propagate clocks and our advanced clock interaction diagram.

User Grey Cell (UGC) for IP-based Designs

In a typical flow, designers have to black box their generated or non-synthesizable IPs. The resulting CDC analysis is incomplete and does not report many CDC issues that lead to metastability in the field. With Blue Pearl’s User Grey Cell™ (UGC) methodology, CDC issues across boundary interfaces can be identified. Blue Pearl contains vendor UGC models and UGCs are easy to create from your databook.

To Learn More, Download the Clock Domain Crossing Datasheet

Learn More

Download Visual Verification Suite and request your 45 day Starter Edition license and get started today