Articles Archive Xilinx Xcell journal (05-Nov-2013 ) “Article in Xcell85: Blue Pearl automates the RTL guidelines outlined in the Xilinx UltraFast Methodology,” by Mike Santarini, published November 05, 2013 at Xilinx Xcell journal. Embedded Software Store (22-Jul-2013 ) “What is an RTL tool doing next to ARM embedded software?,” by Don Dingee, published July 22, 2013 at EmbeddedSoftwareStore. EDA Cafe (06-Dec-2012 ) “Blue Pearl: Facilitating FPGA design,” by Peggy Aycinena, published December 26, 2012 at EDA Cafe. EE Times(26-Oct-2012 ) “RTL analysis for complex FPGA designs using a Grey Cell methodology,” by Shakeel Jeeawoody, published October 26, 2012 at EE Times. Gabe on EDA (23-Oct-2012 ) “Blue Pearl Announces Software Release with Enhanced Path Analysis,” by Gabe Moretti, published October 23, 2012 at Gabe on EDA. HPCwire ( 03-Oct-2012 ) “ADACSYS, Blue Pearl Software Hold Tutorial on Best FPGA Design Practices,” published October 03, 2012 at HPCwire. Chip Design Magazine (27-Sep-2012 ) “Experts At The Table: FPGA Prototyping Issues,” by Ed Sperling, published September 27, 2012 at Chip Design Magazine. EE Times – EDA DesignLine ( 12-Sep-2012 ) “CEO Spotlight: Ellis Smith, Blue Pearl Software,” by Brian Bailey, published September 12, 2012 at EE Times. EE Times ( 26-May-2012 ) “Stuff to see at DAC: Blue Pearl Software,” by Clive Maxfield, published May 26, 2012 at EE Times. Xilinx Xcell Journal ( 25-Apr-2012 ) “New Tools take the pain out of FPGA synthesis,” by Shakeel Jeeawoody, published April 25, 2012 at Xcell journal. FPGABlog ( 15-Mar-2012 ) “Blue Pearl Software Suite Supports Synopsys Synplify Pro FPGA Synthesis,” by Kevin Cheung, published March 15, 2012 at FPGA Blog. Tech Design Forum ( 15-Mar-2012 ) “DATE notebook: Constraints smooth path for FPGA synthesis,” by Chris Edwards, published March 15, 2012 at Tech Design Forum. EDACafe ( 15-Mar-2012 ) “Blue Pearl: Language Support & Workshops,” by Peggy Aycinena, published March 15, 2012 at EDACafe. Tech-On, Japan ( 15-Mar-2012 ) “Blue Pearl Software supports SystemVerilog and VHDL,” by Kojima Ikutaro, published March 15, 2012 at Tech-On, Japan. EETimes ( 14-Mar-2012 ) “Blue Pearl Software supports Synopsys Synplify Pro FPGA design flow,” by Clive Maxfield , published March 14, 2012 in EETimes. EEJournal ( 02-Mar-2012 ) “V for Verification – DVCon 2012 Breakdown,” by Amelia Dalton, published March 02, 2012 in EEJournal. EETimes ( 27-Feb-2012 ) “Blue Pearl is offering free hands-on workshops…,” by Clive Maxfield, published Feb 27, 2012 in EETimes. FGPA Blog ( 21-Feb-2012 ) “Blue Pearl Software Suite Release 6.0 Improves Support for FPGA, SystemVerilog, VHDL,” by Ken Cheung, published Feb 21, 2012 at FPGA Blog. FGPA Central ( 17-Feb-2012 ) “Find and Analyze the Longest Combinational Paths, Meet Performance Goals,” by Shakeel Jeeawoody, published Feb 17, 2012 at FPGA Central. EETimes ( 16-Feb-2012 ) “Blue Pearl’s EDA tools boast SystemVerilog and FPGA enhancements,” by Clive Maxfield , released Feb 16, 2012 in EETimes. Marketwire ( 16-Feb-2012 ) “Verific Design Automation Selected to Support Blue Pearl Software Suite,” by Verific Design Automation, released Feb 16, 2012 at Marketwire. EETimes ( 14-Dec-2011 ) “A Visit With Blue Pearl Software,” by Gabe Moretti , released Dec 14, 2011 at GabeonEda. Request Private Demo
“Article in Xcell85: Blue Pearl automates the RTL guidelines outlined in the Xilinx UltraFast Methodology,” by Mike Santarini, published November 05, 2013 at Xilinx Xcell journal.
“What is an RTL tool doing next to ARM embedded software?,” by Don Dingee, published July 22, 2013 at EmbeddedSoftwareStore.
“Blue Pearl: Facilitating FPGA design,” by Peggy Aycinena, published December 26, 2012 at EDA Cafe.
“RTL analysis for complex FPGA designs using a Grey Cell methodology,” by Shakeel Jeeawoody, published October 26, 2012 at EE Times.
“Blue Pearl Announces Software Release with Enhanced Path Analysis,” by Gabe Moretti, published October 23, 2012 at Gabe on EDA.
“ADACSYS, Blue Pearl Software Hold Tutorial on Best FPGA Design Practices,” published October 03, 2012 at HPCwire.
“Experts At The Table: FPGA Prototyping Issues,” by Ed Sperling, published September 27, 2012 at Chip Design Magazine.
“CEO Spotlight: Ellis Smith, Blue Pearl Software,” by Brian Bailey, published September 12, 2012 at EE Times.
“Stuff to see at DAC: Blue Pearl Software,” by Clive Maxfield, published May 26, 2012 at EE Times.
“New Tools take the pain out of FPGA synthesis,” by Shakeel Jeeawoody, published April 25, 2012 at Xcell journal.
“Blue Pearl Software Suite Supports Synopsys Synplify Pro FPGA Synthesis,” by Kevin Cheung, published March 15, 2012 at FPGA Blog.
“DATE notebook: Constraints smooth path for FPGA synthesis,” by Chris Edwards, published March 15, 2012 at Tech Design Forum.
“Blue Pearl: Language Support & Workshops,” by Peggy Aycinena, published March 15, 2012 at EDACafe.
“Blue Pearl Software supports SystemVerilog and VHDL,” by Kojima Ikutaro, published March 15, 2012 at Tech-On, Japan.
“Blue Pearl Software supports Synopsys Synplify Pro FPGA design flow,” by Clive Maxfield , published March 14, 2012 in EETimes.
“V for Verification – DVCon 2012 Breakdown,” by Amelia Dalton, published March 02, 2012 in EEJournal.
“Blue Pearl is offering free hands-on workshops…,” by Clive Maxfield, published Feb 27, 2012 in EETimes.
“Blue Pearl Software Suite Release 6.0 Improves Support for FPGA, SystemVerilog, VHDL,” by Ken Cheung, published Feb 21, 2012 at FPGA Blog.
“Find and Analyze the Longest Combinational Paths, Meet Performance Goals,” by Shakeel Jeeawoody, published Feb 17, 2012 at FPGA Central.
“Blue Pearl’s EDA tools boast SystemVerilog and FPGA enhancements,” by Clive Maxfield , released Feb 16, 2012 in EETimes.
“Verific Design Automation Selected to Support Blue Pearl Software Suite,” by Verific Design Automation, released Feb 16, 2012 at Marketwire.
“A Visit With Blue Pearl Software,” by Gabe Moretti , released Dec 14, 2011 at GabeonEda.